Incandescent lamps are now being gradually replaced by Compact Fluorescent Lamps (CFLs) as CFLs consume less power to produce the same light output and its lifetime is much longer than that of an incandescent lamp. However, current CFLs have the following drawbacks: (1) the line current drawn from the CFL produce a large amount of unwanted harmonics that results in very poor input power factor; (2) the dimming performance of a CFL with conventional incandescent lamp dimmers is very poor. The performance of the CFL depends on the design of the electronic ballast circuit that is located at the base of each CFL. For a CFL electronic ballast to be practical, its size and cost is of utmost importance. Thus, the main challenge in the design of practical dimmable CFL ballasts is to solve the aforementioned CFL performance issues while minimizing its size and cost.
In the first part of this dissertation, two novel high power factor single-stage electronic ballast topologies are proposed to solve the poor power factor issue of the CFLs that are currently on the market. Both proposed circuits have the following advantages: (1) only one switch is required in the power circuit; (2) the switch has both lower current and voltage stress than other conventional circuits; (3) the built-in power factor correction (PFC) circuit allows incandescent phase-cut dimmer to be used for dimming the CFL; (4) the circuit design is simple and it requires less system space compared to other conventional high PF electronic ballast topologies. The second part of this dissertation proposes a new control circuit that enables the lamp to maintain high power factor throughout the majority of the dimming range. In the proposed control scheme, the dimmer phase-cut angle is fed-forward to the control circuit. The controller then determines the proper duty cycle based on the phase-cut angle to facilitate the desired dimming operation. This novel control circuit was first implemented using analog circuitry. After assessing the performance of the analog version of the proposed controller, it was then digitally implemented through the Field Programmable Gate Array (FPGA) technique. The feasibility and performance of both the proposed electronic ballasts and control concept have been verified through theoretical analysis, simulation and experimental results on a 13W 4-pin D/E CFL from Osram Sylvania. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2010-04-30 12:51:59.682
| Identifer | oai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:OKQ.1974/7329 |
| Date | 18 July 2012 |
| Creators | Lam, John |
| Contributors | Queen's University (Kingston, Ont.). Theses (Queen's University (Kingston, Ont.)) |
| Source Sets | Library and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada |
| Language | English, English |
| Detected Language | English |
| Type | Thesis |
| Rights | This publication is made available by the authority of the copyright owner solely for the purpose of private study and research and may not be copied or reproduced except as permitted by the copyright laws without written authority from the copyright owner. |
| Relation | Canadian theses |
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