Thesis deals with design of phase locked loop, which will be used as frequency multiplier. Full integrated phase locked loop with current pump is presented.
Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:217873 |
Date | January 2009 |
Creators | Konečný, Tomáš |
Contributors | Pavlík, Michal, Háze, Jiří |
Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
Source Sets | Czech ETDs |
Language | Czech |
Detected Language | English |
Type | info:eu-repo/semantics/masterThesis |
Rights | info:eu-repo/semantics/restrictedAccess |
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