Full integration of CMOS low noise amplifiers (LNA) presents a challenge for low
cost CMOS receiver systems. A critical problem faced in the design of an RF CMOS LNA
is the inaccurate high-frequency noise model of the MOSFET implemented in circuit
simulators such as SPICE. Silicon-based monolithic inductors are another bottleneck in RF
CMOS design due to their poor quality factor.
In this thesis, a CMOS implementation of a fully-integrated differential LNA is
presented. A small-signal noise circuit model that includes the two most important noise
sources of the MOSFET at radio frequencies, channel thermal noise and induced gate
current noise, is developed for CMOS LNA analysis and simulation. Various CMOS LNA
architectures are investigated. The optimization techniques and design guidelines and
procedures for an LC tuned CMOS LNA are also described.
Analysis and modeling of silicon-based monolithic inductors and transformers are
presented and it is shown that in fully-differential applications, a monolithic transformer
occupies less die area and achieves a higher quality factor compared to two independent
inductors with the same total effective inductance. It is also shown that monolithic
transformers improve the common-mode rejection of the differential circuits. / Graduation date: 1999
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/33529 |
| Date | 18 August 1998 |
| Creators | Zhou, Jianjun J. |
| Contributors | Allstot, David J. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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