The electrical properties of sulfonated polyaniline (SPAN) and polyaniline (PANI) grown on both conventional (100) and high Miller index GaAs surfaces are investigated. These devices were electrically characterized using Current-Voltage (I-V), Capacitance-Voltage (C-V), Capacitance-Frequency (C-F), Capacitance-Conductance-Frequency (C-G-F), Deep Level Transient Spectroscopy (DLTS), and Laplace DLTS measurements in the temperature range 20 – 440 K. Electrically active defects are generated at/near the interface and away from the interface with energy levels deep in the bandgap of the materials. These defects considerably affect the electrical and optical properties of the devices. This thesis reports the effect of n-type GaAs substrate orientation, namely (100), (311)A and (311)B, on the electrical properties of sulfonated polyaniline (SPAN)/GaAs heterojunction devices. It was found that the interface state density (Dit) of SPAN/(311)B GaAs samples is lower than that of (100) and (311)A GaAs devices. This behaviour is attributed to the effect of crystallographic orientation of the substrates, and was confirmed by DLTS results as well. In addition, the inhomogeneity of the interface between various GaAs substrates and SPAN is investigated in terms of barrier height and ideality factor by performing I–V measurements at different temperatures (20–420 K). The I–V results indicate that the value of the rectification ratio (IF/IR) at 0.5 V is higher for SPAN/(311)B GaAs samples than for SPAN/(100) GaAs and SPAN/(311)A GaAs samples. Moreover, the barrier height decreases and the ideality factor increases with decreasing temperature for all three heterostructure devices. This thesis also reports an extensive study of the electrical properties of PANI/GaAs (organic-inorganic) hybrid heterojunctions. Polyaniline (PANI) thin films were deposited by a very simple technique on (100), (311)A and (311)B ntype Gallium Arsenide (GaAs) substrates to fabricate hybrid devices with excellent electrical properties. The DLTS and Laplace DLTS measurements illustrated that the number of defects at/very close to the interface region in PANI/(311)A GaAs samples is lower than those of PANI/(100) GaAs and PANI/(311)B GaAs samples. Moreover, the analysis of I–V characteristics based on the thermionic emission mechanism has shown a decrease of the barrier height and an increase of the ideality factor at lower temperatures for all the three hybrid devices. The interface states were analysed by series resistance obtained using the C–G–V methods. The interface state density (Dit) of PANI/(100) GaAs devices is approximately one and two order of magnitude higher than that of PANI/(311)B GaAs and PANI/(311)A GaAs devices, respectively. Additionally, the devices show excellent air stability, with rectification ratio values almost unaltered after two years of storage under ambient conditions, making the polyaniline an interesting conductor polymer for future devices applications.
| Identifer | oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:698032 |
| Date | January 2016 |
| Creators | Jameel, Dler Adil |
| Publisher | University of Nottingham |
| Source Sets | Ethos UK |
| Detected Language | English |
| Type | Electronic Thesis or Dissertation |
| Source | http://eprints.nottingham.ac.uk/36040/ |
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