Because of limited tester time and memory, a primary goal of digital circuit manufacture test generation is to create compact test sets. Test generation programs that use Ordered Binary Decision Diagrams (OBDDs) as their primary functional representation excel at this task. Unfortunately, the use of OBDDs limits the application of these test generation programs to small circuits. This is because the size of the OBDD used to represent a function can be exponential in the number of the function's switching variables. Working with these functions can cause OBDD-based programs to exceed acceptable time and memory limits. This research proposes using Ordered Partial Decision Diagrams (OPDDs) instead as the primary functional representation for test generation systems. By limiting the number of vertices allowed in a single OPDD, complex functions can be partially represented in order to save time and memory. An OPDD-based test generation system is developed and techniques which improve its performance are evaluated on a small benchmark circuit. The new system is then demonstrated on larger and more complex circuits than its OBDD-based counterpart allows.
| Identifer | oai:union.ndltd.org:TEXASAandM/oai:repository.tamu.edu:1969.1/498 |
| Date | 30 September 2004 |
| Creators | Cobb, Bradley Douglas |
| Contributors | Mercer, M. Ray, Reddy, A. L. Narasimha, Grimaila, Michael |
| Publisher | Texas A&M University |
| Source Sets | Texas A and M University |
| Language | en_US |
| Detected Language | English |
| Type | Electronic Thesis, text |
| Format | 174418 bytes, 97642 bytes, electronic, application/pdf, text/plain, born digital |
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