In this thesis, a new approach combining neural networks and genetic algorithms is presented for microwave design. In this method, an accurate neural network model is developed from the experimental data. This neural network model is used to perform sensitivity analysis and derive response surfaces. An innovative technique is then applied in which genetic algorithms are coupled with the neural network model to assist in synthesis and optimization. The proposed method is used for modeling and analysis of circuit parameters for flip chip interconnects up to 35 GHz, as well as for design of multilayer inductors and capacitors at 1.9 GHz and 2.4 GHz. The method was also used to synthesize mm wave low pass filters in the range of 40-60 GHz. The devices obtained from layout parameters predicted by the neuro-genetic design method yielded electrical response close to the desired value (95% accuracy). The proposed method also implements a weighted priority scheme to account for tradeoffs in microwave design. This scheme was implemented to synthesize bandpass filters for 802.11a and HIPERLAN wireless LAN applications in the range of 5-6 GHz.
This research also develops a novel neuro-genetic design centering methodology for yield enhancement and design for manufacturability of microwave devices and circuits. A neural network model is used to calculate yield using Monte Carlo methods. A genetic algorithm is then used for yield optimization. The proposed method has been used for yield enhancement of SiGe heterojunction bipolar transistor and mm wave voltage-controlled oscillator. It results in significant yield enhancement of the SiGe HBTs (from 25 % to 75 %) and VCOs (from 8 % to 85 %). The proposed method is can be extended for device, circuit, package, and system level integrated co-design since it can handle a large number of design variables without any assumptions about the component behavior. The proposed algorithm could be used by microwave community for design and optimization of microwave circuits and systems with greater accuracy while consuming less computational time.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/7225 |
| Date | 19 July 2005 |
| Creators | Pratap, Rana Jitendra |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | 1789513 bytes, application/pdf |
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