The performance of different current controller structures for Voltage Source Converters (VSC) under weak grid conditions caused by large grid impedance is investigated. The VSC is synchronized to the grid by a Phase Locked Loop (PLL). Current control techniques and PLL techniques for handling both symmetrical and asymmetrical conditions are presented and discussed. The investigated current control structures are; the conventional Proportional Integral (PI)-controller in the synchronous rotating reference frame, dual PI-controllers implemented in positive- and negative-sequence rotating reference frame, the Proportional Resonant (PR)-controller in the stationary reference frame, the phase current hysteresis controller, and a space vector base hysteresis controller in the synchronous rotating reference frame. The PLL-techniques used for synchronization are; a conventional synchronous rotating reference frame PLL, a PLL with notch filter, and a Decoupled Double Synchronous Reference frame PLL (DDSRF-PLL).The different current control strategies and PLL-techniques are studied by simulations. The results show how large grid impedance can influence the dynamic response of the system and how the interaction between the PLLs, the current controllers and the large grid inductance can even trigger instability when the voltage measurements are highly influenced by the operation of the converter. The PI-controllers in the synchronous rotating reference frames are particularly sensitive to oscillations that can be reinforced when the measured voltage feed-forward terms are used in the control system. The response of the PR-controller is instead slowed down by the interaction with the PLL, while both the hysteresis controllers are quickly tracking the reference value as long as the interaction with the PLL is not leading to instability.Operation under asymmetrical weak grid conditions are investigated for current controllers that exploit PLL techniques designed to remove the oscillations that occur in the positive sequence reference frame voltage during unbalanced grid voltage. The simulations show that the DDSRF-PLL has a shorter transient period than the PLL with notch filter, but with a small steady state 100 Hz oscillation under the weak asymmetrical grid conditions.The results indicate that the tuning of the PLL is of large importance for the stability of the control system, and that a slower PLL can lead to less interaction with the current controllers at the cost of a slower and less accurate dynamic overall control performance.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:ntnu-11413 |
| Date | January 2010 |
| Creators | Midtsund, Tarjei |
| Publisher | Norges teknisk-naturvitenskapelige universitet, Institutt for elkraftteknikk, Institutt for elkraftteknikk |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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