International Telemetering Conference Proceedings / October 26-29, 1992 / Town and Country Hotel and Convention Center, San Diego, California / Our telemetry department has an application for a data categorization/compression of a
high speed transient signal in a short period of time. Categorization of the signal reveals
important system performance and compression is required because of the terminal nature
of our telemetry testing. Until recently, the hardware for the system of this type did not
exist. A new exploratory device from Intel has the capability to meet these extreme
requirements. This integrated circuit is an analog neural network capable of performing 2
billion connections per second. The two main advantages of this chip over traditional
hardware are the obvious computation speed of the device and the ability to compute a
three layer feed-forward neural network classifier. The initial investigative development
work using the Intel chip has been completed. The results from this proof of concept will
show data categorization/compression performed on the neural network integrated circuit
in real time. We will propose a preliminary design for a transient measurement system
employing the Intel integrated circuit.
| Identifer | oai:union.ndltd.org:arizona.edu/oai:arizona.openrepository.com:10150/608892 |
| Date | 10 1900 |
| Creators | Larson, P. T., Sheaffer, D. A. |
| Contributors | Sandia National Laboratories |
| Publisher | International Foundation for Telemetering |
| Source Sets | University of Arizona |
| Language | en_US |
| Detected Language | English |
| Type | text, Proceedings |
| Rights | Copyright © International Foundation for Telemetering |
| Relation | http://www.telemetry.org/ |
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