This thesis presents a novel three-level modulation technique for a Class-D audio amplifier, attempting to improve the poor performance of the conventional two-level modulation scheme at low input levels. The main drawback of the conventional two-level PWM (pulse-width modulation) and SDM (sigma-delta modulation) Class-D amplifier is that, with a zero input or small input, the excessively fast switching action at the output causes unwanted switching loss and switching noise, resulting in unnecessary energy waste and SNDR degradation. The presented three-level modulation circuit mainly consists of a linear feedback compensator, two comparators, and a switching logic circuit. The simulation and experimental results shows that the proposed three-level modulation s cheme outperforms the two-level sigma-delta modulation scheme in both efficiency and performance.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0907105-145635 |
| Date | 07 September 2005 |
| Creators | Lin, Yu-Hsiu |
| Contributors | Chia-Hsiung Kao, Shu-Yuan Chin, Tai-Haur Kuo, Jwu-Sheng Hu, Shiang-Hwua YU |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907105-145635 |
| Rights | off_campus_withheld, Copyright information available at source archive |
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