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Implementation and Design of a Cycle-Efficient 64b/32b Integer Divider Using a Table-Sharing Method

The first topic of this thesis is a mixed radix-16/8/4/2 64b/32b integer divider which uses a variety of techniques, including operand scaling, table partitioning, and table sharing, to increase performance without paying the cost of increasing complexity.
The second topic is a noise immune address transition detector¡]ATD¡^circuit. We employ a simple feedback loop to stabilize the generated CS¡]chip select¡^signal and two delay cells to dynamically adjust the width of the CS strobe.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0615101-142238
Date15 June 2001
CreatorsWang, Jun-Jie
ContributorsSying-Jyan Wang, Chenn-Jung Hunng, Chua-Chin Wang, J.-M. Kuo
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615101-142238
Rightsnot_available, Copyright information available at source archive

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