The first topic of this thesis is a mixed radix-16/8/4/2 64b/32b integer divider which uses a variety of techniques, including operand scaling, table partitioning, and table sharing, to increase performance without paying the cost of increasing complexity.
The second topic is a noise immune address transition detector¡]ATD¡^circuit. We employ a simple feedback loop to stabilize the generated CS¡]chip select¡^signal and two delay cells to dynamically adjust the width of the CS strobe.
Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0615101-142238 |
Date | 15 June 2001 |
Creators | Wang, Jun-Jie |
Contributors | Sying-Jyan Wang, Chenn-Jung Hunng, Chua-Chin Wang, J.-M. Kuo |
Publisher | NSYSU |
Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
Language | Cholon |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615101-142238 |
Rights | not_available, Copyright information available at source archive |
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