In this thesis, we investigate the problem of minimizing printed circuit board assembly time on high-speed pick-and-place machines. As it is considered unlikely that efficient methods will be found for this problem, heuristic methods which give near optimal solutions are sought. Several such methods currently exist, but there are no comparisons made between the different methods. One of the reasons for this is the differences in the models used. In the thesis, we develop a more general model for the problem which encompasses most other models, and is robust, i.e. it can easily be adapted to different situations. We adapt two of the heuristic methods from the literature to this model, implement and test them and report the resulting assembly times. We also provide improvements to these methods, and improved lower bounding techniques for the problem. Finally, we adapt the best method to a real-world situation, namely the environment at the Mitel Corporation in Ottawa, Canada. We test this method against the sophisticated software tool currently being used at Mitel, with good results.
| Identifer | oai:union.ndltd.org:uottawa.ca/oai:ruor.uottawa.ca:10393/9994 |
| Date | January 1995 |
| Creators | Weedmark, Mark Archie. |
| Contributors | Boyd, Sylvia, |
| Publisher | University of Ottawa (Canada) |
| Source Sets | Université d’Ottawa |
| Detected Language | English |
| Type | Thesis |
| Format | 128 p. |
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