<p>This thesis demonstrates the high- level modelling and design of oversampled delta- sigma noise shapers for D/A conversion. It presents an overview and study on digital- to- analog converters (DAC) followed by the noise shapers. It helps us to understand how to design a noise shaper model and algorithmic expressions are presented. The models are verified through high level simulations. The usage of models is to reduce the design time and get a good understanding for fundamental limitations on performance. Instead of time consuming circuit- level simulations, we point out the behavioural- level and algorithmic- level simulations of the noise shaper and the entire system comprising of interpolation filter, noise shaper followed by pulse amplitude modulation and reconstruction filtering. We have used the delta- sigma modulators to reduce the number of bits representing the digital signal. It is found that the requirement on oversampled DACs are tough. It is emphasised that the design of an oversampling converter is a filter designproblem. There is a large number of trade- offs that can be made between the different building blocks in the OSDAC.</p>
| Identifer | oai:union.ndltd.org:UPSALLA/oai:DiVA.org:liu-173 |
| Date | January 2005 |
| Creators | Parihar, Vikram Singh |
| Publisher | Linköping University, Department of Electrical Engineering, Institutionen för systemteknik |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, text |
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