Most discrete time filters use Switched Capacitor structures, but Switched capacitor circuits have finite sampling rate and high power consumption. In this paper we use Switched Current structure to increase sampling rate and reduce power consumption.
In this paper, we use a Class-AB structure to compose a double sampling third order low-pass filter. In this paper there are two integrator types. Modified backward Euler and modified forward Euler integrators were realized with double sampling technology from the backward Euler and forward Euler integrators. Compared with other circuits, the circuit has low power supply¡Blow power consumption ¡Bhigh sampling speed.
We employ HSPICE and MATLAB to simulate and design the circuit. We use TSMC 0.35£gm process to implement this circuit. The power supply is 1.8V, the cut-off frequency is 3.6MHz, the sampling frequency is 72MHz, and the power consumption is 1.303mW.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0901111-131401 |
| Date | 01 September 2011 |
| Creators | Cheng, Mao-Yung |
| Contributors | Jyi-Tsong Lin, Ko-Chi Kuo, Chia-Hsiung Kao, Tzyy-Sheng Horng |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901111-131401 |
| Rights | user_define, Copyright information available at source archive |
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