A 0.18 um CMOS half-rate clock and data recovery circuit with reference-less dual loop /

Description

Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 70-71). Also available in electronic format on the Internet.

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1. http://proxy.library.carleton.ca/login?url= http://wwwlib.umi.com/cr/carleton/fullcit?pMR16459

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Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/290965634
Date	January 1900
Creators	Huang, Wenjie.
Publisher	Ottawa:
Source Sets	OCLC
Language	English
Detected Language	English
Source	ProQuest Full Text