This thesis describes the design of a domain specific DSP processor. The thesis is divided into two parts. The first part gives some theoretical background, describes the different steps of the design process (both for DSP processors in general and for this project) and motivates the design decisions made for this processor. The second part is a nearly complete design specification. The intended use of the processor is as a platform for hardware acceleration units. Support for this has however not yet been implemented.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-980 |
| Date | January 2001 |
| Creators | Tell, Eric |
| Publisher | Linköpings universitet, Institutionen för systemteknik, Institutionen för systemteknik |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | LiTH-ISY-Ex, ; 3209 |
Page generated in 0.0018 seconds