Approved for public release; distribution is unlimited / The goal of this thesis is the development of a programmable logic array
(PLA) that accepts multiple-valued inputs and produces multiple valued outputs. The
PLA is implemented in CMOS and multiple levels are encoded as current. It is
programmed by choosing transistor geometries which control the current level at
which the PLA reacts to inputs. An example of a 4-valued PLA is shown. As part
of this research, a C program was written that produces a PLA layout. / http://archive.org/details/designofmultiple00koyo / Major, Republic of Korea Air Force
| Identifer | oai:union.ndltd.org:nps.edu/oai:calhoun.nps.edu:10945/23167 |
| Date | 12 1900 |
| Creators | Ko, Yong Ha |
| Contributors | Butler, Jon T., Yang, Chyan, Naval Postgraduate School (U.S.), Electrical and Computer Engineering |
| Source Sets | Naval Postgraduate School |
| Language | en_US |
| Detected Language | English |
| Type | Thesis |
| Format | 61 p., application/pdf |
| Rights | Copyright is reserved by the copyright owner |
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