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Modeling and Evaluating Lead-frame CSPs for Radio-Frequency Integrated Circuit Applications

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In this thesis, a two-step de-embedded techniques was applied to measure the important parameters, ft and fmax , of the heterojunction bipolar transistors(HBTs).
The same technique was also used to measure the wide-band S parameters for modeling and evaluating the bump chip carrier(BCC) packages. In the simulation, the Ansoft HFSS simulator was used to calculate the insertion and return losses for some bare and packaged test chips. Comparison between simulated and measured results has been discussed in detail to illustrate the applicability of the HFSS simulator.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0630101-120251
Date30 June 2001
CreatorsHuang, Hui-Hsiang
ContributorsSheng-fuh Chang, Tzong-Lin Wu, Huey-Ru Chuang, Tzyy-Sheng Horng
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630101-120251
Rightswithheld, Copyright information available at source archive

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