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RSFQ digital circuit design automation and optimisation

Thesis (PhD)--Stellenbosch University, 2015. / ENGLISH ABSTRACT: In order to facilitate the creation of complex and robust RSFQ digital logic
circuits an extensive library of electronic design automation (EDA) tools is a
necessity. It is the aim of this work to introduce various methods to improve
the current state of EDA in RSFQ circuit design.
Firstly, Monte Carlo methods such as Latin Hypercube sampling and Sobol
sequences are applied for their variance reduction abilities in approximating
circuit yield. In addition, artificial neural networks are also investigated for
their applicability in modeling the parameter-yield space.
Secondly, a novel technique for circuit functional testing using automated
state machine extraction is presented, which greatly simplifies the logical verification
of a circuit. This method is also used, along with critical timing
extraction, to automatically generate Hardware Description Language(HDL)
models which can be used for high level circuit design.
Lastly, the Greedy Local search, Simulated Annealing and Genetic Algorithm
meta-heuristics were statistically compared in a novel manner using a
yield model provided by artificial neural networks. This is done to ascertain
their performance in optimising RSFQ circuits in relation to yield.
The variance reduction techniques of Latin Hypercube Sampling and Sobol
sequences were shown to be beneficial for the use with RSFQ circuits. For
optimisation purposes the use of Simulated Annealing and Genetic Algorithms
were shown to improve circuit optimisation for possible multi-modal search
spaces. An HDL model is also successfully generated from a complex RSFQ
circuit for use in high level circuit design which includes critical timing and
propagation latency.
All the techniques presented in this study form part of a software library
that can be further refined and extended in future work.

Identiferoai:union.ndltd.org:netd.ac.za/oai:union.ndltd.org:sun/oai:scholar.sun.ac.za:10019.1/96808
Date03 1900
CreatorsMuller, Louis C.
ContributorsFourie, Coenrad J., Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.
PublisherStellenbosch : Stellenbosch University
Source SetsSouth African National ETD Portal
Languageen_ZA
Detected LanguageEnglish
TypeThesis
Format151 pages : illustrations
RightsStellenbosch University

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