This thesis is aimed to specify and implement multi-purpose framework able to deal with graphical real-time system specification. This tool allows to use arbitrary verification approach to resulting system model check. Description of basic formal specification methods based on mathematic logic is done. Some well-known hierarchical graphical specifications for real-time systems are depictured. Author proposed suitable cases for functionality examination of resulting framework.
Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:236757 |
Date | January 2009 |
Creators | Gach, Marek |
Contributors | Slaný, Karel, Strnadel, Josef |
Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
Source Sets | Czech ETDs |
Language | Czech |
Detected Language | English |
Type | info:eu-repo/semantics/masterThesis |
Rights | info:eu-repo/semantics/restrictedAccess |
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