The interconnect fabric that provides electrical connectivity to active devices is an essential component to modern semiconductor chips. As the dimensions of these devices are scaled to improve performance and keep pace with Moore's Law, the local Cu interconnects must scale in parallel. Intrinsic material properties of Cu result in spiking electrical resistivity with scaling and present a looming bottleneck to chip performance. In this thesis, we introduce graphene as a replacement material to Cu interconnects in support of future chip scaling. In particular we focus on experimentally establishing fundamental mechanisms of chemically doping graphene via the basal plane and edge passivation, with broad contributions that extend beyond the focus of local interconnects.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/47581 |
| Date | 18 March 2013 |
| Creators | Brenner, Kevin A. |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Detected Language | English |
| Type | Dissertation |
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