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A medium-grain reconfigurable architecture for digital signal processing

Thesis (Ph. D.)--Washington State University, May 2006. / Includes bibliographical references (p. 91-94).

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/69678938
Date January 2006
CreatorsMyjak, Mitchell John.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceOnline access for everyone

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