High bandwidth of networks demands high performance communication processors that
integrate application processing, network processing, and system support functions into
a single, low cost System-On-Chip (SOC) solution. However, conventional processors,
when used in network related applications, are beset by the overhead of save/restore of
register context, cache misses due to fetching interrupt handler from memory, and the
possibility of NIC buffer overflow. Therefore, this paper analyzes the effectiveness of
multithreading to service interrupts on an embedded processor from the perspective of a
Network processor and a Communication processor. A Simulation environment
enhanced with a multithreaded hardware execution model is used and our results reveal
that multithreading for interrupts from a single NIC brings a fair improvement in
performance of Network processors and little or no effect on Communication processors.
However, our analysis also show that multithreading for interrupts has a lot of potential
when applied to communication processors with multiple interrupt sources, such as
Ethernet, ATM, USB, and HDLC.
Index terms: Multithreading, UDP, IP, device driver, interrupt processing,
communication processor. / Graduation date: 2003
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/30122 |
| Date | 01 May 2003 |
| Creators | Pattery, Vinu J. |
| Contributors | Lee, IL-Beom |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
Page generated in 0.0019 seconds