A novel approach to the design of multi-junction solar cells on silicon substrates for 1-sun applications is described. Models for device simulation including porous silicon layers are presented. A silicon bottom subcell is formed by diffusion of dopants into a silicon wafer. The top of the wafer is porosified to create a compliant layer, and a III-V buffer layer is then grown epitaxially, followed by middle and top subcells. Due to the resistivity of the porous material, these designs are best suited to high efficiency 1-sun applications. Numerical simulations of a multi-junction solar cell incorporating a porous silicon compliant membrane indicate an efficiency of 30.7% under AM1.5G, 1-sun for low threading dislocation densities (TDD), decreasing to 23.7% for a TDD of 10^7 cm^-2.
Identifer | oai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:OOU.#10393/24096 |
Date | 30 April 2013 |
Creators | Wilkins, Matthew M. |
Source Sets | Library and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada |
Language | English |
Detected Language | English |
Type | Thèse / Thesis |
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