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Power Analysis and Low Power Scheduling Techniques for Intelligent Memory System

Power consumption is gradually becoming an important issue of designing computing systems. Most of the researches of low power issues have focused on semiconductor techniques or hardware architecture designs, but less utilized the techniques of software optimization. This paper presents a new scheduling methodology in source code level for Intelligent Memory System, which reduces the energy consumption by means of code compilation techniques. The scheduling kernel provides two options for users: performance-oriented low power scheduling and energy-oriented low power scheduling, to achieve the objective of considering high performance and low power issues. The experimental results are also presented and discussed.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0727101-192313
Date27 July 2001
CreatorsCheng, Lien-Fu
ContributorsTsung-Chuan Huang, Ting-Wei Hou, Chyi-Ren Dow, Tse-Sheng Chen, Chu-Sing Yang
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727101-192313
Rightsrestricted, Copyright information available at source archive

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