This thesis deals with designing and realisation of a bus analyzer. The analyzer is programmed into Spartan-3AN XC3S50AN programmable logic device. The design includes a SRAM parallel memory and a graphical LCD display. Data output is realized through USB, microSD memory card and VGA. The thesis also describes the use of a software microprocessor PicoBlaze for the control of the LCD display and user interface. The last part deals with a test application using an 8-bit microcontroller connected to an alphanumeric display and a discussion over the results.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:220146 |
| Date | January 2013 |
| Creators | Galia, Jan |
| Contributors | Valach, Soběslav, Bradáč, Zdeněk |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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