Measured noise performance of a data clock circuit derived from the local M-sequence in direct-sequence spread spectrum systems

Description

Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, September 1990. / Thesis Advisor(s): Myers, Glen. Second Reader: Ha, Tri. "September 1990." Description based on title screen as viewed on December 21, 2009. DTIC Identifiers: Direct sequence spread spectrum, data clocks, delay lock loops, sequence generators. Author(s) subject terms: Direct-sequence spread spectrum, communications, data clock recovery, M-sequence, delay-lock loop, spread spectrum, binary sequence generation. Includes bibliographical references (p. 40). Also available in print.

Links & Downloads

1. http://edocs.nps.edu/npspubs/scholarly/theses/1990/Sep/90Sep%5FHarshbarger.pdf
2. http://handle.dtic.mil/100.2/ADA238335

Tags

Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/491269396
Date	January 1990
Creators	Harshbarger, Stuart D.
Publisher	Monterey, California : Naval Postgraduate School,
Source Sets	OCLC
Language	English
Detected Language	English
Source	(1.84 MB)