Consider the following questions in the early stage of new product development. What should be the target market for proposed design concepts? Who will be the competitors and how fast are they moving forward in terms of performance improvements? Ultimately, is the current design concept and targeted launch date feasible and competitive?
To answer these questions, there is a need to integrate the product benchmarking with the assessment of performance improvement so that analysts can have a risk measure for their R&D target setting practices. Consequently, this study presents how time series benchmarking analysis can be used to assist scheduling new product releases. Specifically, the proposed model attempts to estimate the "auspicious" time by which proposed design concepts will be available as competitive products by taking into account the rate of performance improvement expected in a target segment.
The empirical illustration of commercial airplane development has shown that this new method provides valuable information such as dominating designs, distinct segments, and the potential rate of performance improvement, which can be utilized in the early stage of new product development. In particular, six dominant airplanes are identified with corresponding local RoCs and, inter alia, technological advancement toward long-range and wide-body airplanes represents very competitive segments of the market with rapid changes. The resulting individualized RoCs are able to estimate the arrivals of four different design concepts, which is consistent with what has happened since 2007 in commercial airplane industry.
In addition, the case study of the Exascale supercomputer development is presented to demonstrate the predictive use of the new method. The results indicate that the current development target of 2020 might entail technical risks considering the rate of change emphasizing power efficiency observed in the past. It is forecasted that either a Cray-built hybrid system using Intel processors or an IBM-built Blue Gene architecture system using PowerPC processors will likely achieve the goal between early 2021 and late 2022. This indicates that the challenge to improve the power efficiency by a factor of 23 would require the maximum delay of 4 years to reach the Exascale supercomputer compared to the existing performance curve.
| Identifer | oai:union.ndltd.org:pdx.edu/oai:pdxscholar.library.pdx.edu:open_access_etds-3221 |
| Date | 16 March 2015 |
| Creators | Lim, Dong-Joon |
| Publisher | PDXScholar |
| Source Sets | Portland State University |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Dissertations and Theses |
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