Analysis of three-phase, three-level VSIs is done for high-power high-voltage applications. Complete Space Vector Modulation (SVM) algorithm is developed for a three-phase, three-level converter. Special attention is given to minimization of output ripple and voltage balance of the dc-link input capacitors. Verification of the proposed SVM algorithm is done by computer simulation. Comprehensive small-signal modeling of the three-level converter with a resistive load is developed the first time. Steady-state solutions reveal that the voltage across dc-link input capacitors is constant at the half of the dc-link voltage. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/44365 |
| Date | 22 August 2008 |
| Creators | Cosan, Muhammet |
| Contributors | Electrical Engineering, Boroyevich, Dushan, Lee, Fred C., Lai, Jih-Sheng |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis, Text |
| Format | viii, 92 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 39849308, LD5655.V855_1997.C673.pdf |
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