Advancements in power semiconductor and power converter technology have enabled new low-voltage (LV) and medium-voltage (MV) direct current (DC) distribution systems for a variety of applications. Power electronics converters and DC circuit breakers (DCCBs) are the key components of a DC system and are hence the focus of this work. The combination of growing power density requirements and higher voltages can result in enhanced electric field (E-field) intensities, leaving the system vulnerable to partial discharges (PDs). The manifestation of such PD events gradually degrades the insulation system of the equipment, reducing its lifetime and ultimately leading to total insulation failure. Therefore, inception E-field based insulation design guidelines are developed to help achieve zero-PD operation of power electronics systems with considerations for internal as well as external (surface) E-field distribution. Additionally, surface E-field mitigation methods are experimentally investigated using representative PCB coupons to provide suitable solutions for low air pressure applications. Consequently, E-field management methods consisting of geometry-based techniques are proposed for PCB-based systems to mitigate E-field magnitudes in areas of the system that are prone to peak stresses (e.g. surface interconnections and triple junctions, conductor discontinuities, critical airgaps etc.). Successful design examples are provided including that of a 16 kV rated PCB-based DC bus and a 540 V, 100 kW aircraft generator rectifier unit operating at up to 50,000 ft cruising altitudes.
DC circuit breaker (DCCB) technology, though crucial to ensure the safety of DC systems, is still in the early stages of development. As protection devices, their reliable operation is paramount and the selection and sizing of their components are not trivial. In this regard, comprehensive design guidelines are developed for the DC solid-state circuit breaker (SSCB) to ensure that its functional requirements can be met. System analyses and modeling are performed to understand the interactions between the various components, i.e. solid-state device, metal oxide varistor (MOV), and their impact on the breaker operation. A 2.5 kV, 400 A SSCB prototype is designed and verified with experimental results to validate the design approach.
Traditional MOV based voltage clamping circuits (VCC) used in solid-state circuit breakers (SSCBs) impose a high interruption voltage on the main solid-state device. The voltage burden arises from the material properties of the MOV which fixes its clamping voltage at a value more than twice its maximum continuous dc voltage rating. A novel and reliable VCC termed as the electronic MOV (eMOV) is proposed to decouple the peak clamping voltage of the MOV from the nominal dc voltage of the system aiming to improve the voltage suppression index (V SI = Vpk/Vdc) of the VCC, thereby reducing the peak system voltage and allowing easier insulation design. By virtue of the proposed circuit, a lower voltage rated device can be used for the main switch enabling higher system efficiency and power density.
In all, this work aims to address insulation system design for power electronics converters and systems, ultimately to eliminate PD under specified working voltage conditions for improved electrical safety and insulation lifetime. The implications of high-density integration, unsuitable ambient conditions and higher system voltages are considered to develop a suitable design and assessment methodology for practicing engineers. Techniques to mitigate/ manage E-Field inside and outside (surface) solid dielectric are proposed to attain the above goal. Additionally, design guidelines are formulated for DC SSCBs which are essential to the safety of DC distribution systems and an enhanced VCC is proposed for the same to limit its clamping voltage for easier insulation design. / Doctor of Philosophy / The recent advancements in power conversion technology have promoted the development and use of DC distribution networks for a variety of applications (e.g. electric ships, aircrafts, electric vehicle charging stations etc.). The insulation system of typical power electronics equipment consists of multiple solid insulating media (e.g. PCB dielectric, potting material, conformal coat etc.) separated by air gaps in the assembly. The combination of higher operating voltages, power density targets and unfavorable ambient conditions (e.g. low air pressure) can pose a risk to the insulation system of the equipment, if not addressed. The electric field (E-Field) stresses at certain vulnerable areas can exceed breakdown values of the corresponding media, initiating localized electrical discharge events also called as partial discharges (PD). Internal discharges generally occur in the vicinity of material defects, conductor discontinuities or sharp geometric features, while surface discharges may occur along exposed conductor metallizations on insulator surfaces (at the interface of multiple media) or critical air gaps in the assembly.
PD events, while not posing any imminent threat, can degrade the surrounding area over time to reduce the operating life of the system and in some cases may cause catastrophic failures. Therefore, irrespective of location, such PD events must be eliminated to improve the overall system lifetime and reliability. Therefore, the main focus of this work is to develop insulation design guidelines and methodologies to achieve zero-PD operation of power converters and DC circuit breakers (DCCBs), both of which are key components of DC systems. A generalized design guideline is proposed to help with the insulation design of power electronics systems. Design techniques are developed to reduce E-field magnitude at critical areas to avoid over-designing the insulation system. Successful converter-level design examples are provided to validate the proposed approaches.
DCCB technology is still in the early stages of development. As a protection device, its reliable operation is paramount and the selection and sizing of its components are not trivial.
Therefore, in addition to the above insulation design methodology, comprehensive design guidelines are developed for the solid-state device and voltage clamping circuit (VCC) of the DC solid-state circuit breaker (SSCB), to ensure that its functional requirements can be met.
Additionally, a novel VCC is proposed for the same to limit its fault interruption voltage for easier insulation design. Both SSCB and VCC prototypes are built and successfully demonstrated in a fault current breaking application.
Overall, this dissertation provides a reference for the design and assessment of next generation power electronics converters and DC circuit breakers, to address, specifically, the challenges to their insulation systems.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/116664 |
| Date | 14 November 2023 |
| Creators | Ravi, Lakshmi |
| Contributors | Electrical Engineering, Burgos, Rolando, Dong, Dong, Kekatos, Vasileios, Lu, Guo Quan, Lai, Jih S. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Dissertation |
| Format | ETD, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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