Bibliography: leaves 200-207. / xi, 207 leaves : ill. ; 20 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / The aim of this thesis is to design and implement the hardware mapping of critical paths of a GaAs Core Processor for a Solid Modelling Accelerator. The solid modelling accelerator is designed using GaAs/CMOS/B:CMOS unified technology. High speed GaAs technology is used in the core processor to deal with floating point intensive calculations, while CMOS technology is used where high speed outputs are not required. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1996
| Identifer | oai:union.ndltd.org:ADTP/260009 |
| Date | January 1996 |
| Creators | Cui, Song |
| Source Sets | Australiasian Digital Theses Program |
| Language | en_US |
| Detected Language | English |
Page generated in 0.0023 seconds