One particular application domain of interest for sensor networks is in the real-time processing of audio information for ecological research questions such as species identification. Real-time audio processing generally involves sophisticated signal processing algorithms and requires substantial computational power. As FPGAs increase in capacity and speed but decrease in cost and power consumption, they are now able to provide low-cost, high performance, energy efficient, flexible, and convenient implementations for a wide range of digital systems. This thesis uses the computational power and single-chip solution capabilities of FPGAs to implement a typical audio processing application for sensor networks onto an FPGA using software / hardware co-design approach, and then evaluate the usefulness of this approach. Some background on sensor networks, audio recognition, FPGAs, MicroBlaze and hardware / software co-design is firstly introduced. A few widely adopted feature extraction and pattern matching algorithms are also presented and compared. Several digital signal processing applications based on FPGAs are then reviewed and analyzed. Software / hardware co-design method is then employed to implement an example system. A bird call recognition system based on linear predictive cepstral coefficients and dynamic time warping algorithm is developed and verified on a PC. Then, a software-only solution for this bird call recognition system is implemented on an FPGA with embedded MicroBlaze processor in a Xilinx development board. By means of code profiling, the performance bottlenecks of the software-only solution are identified. Taking the profiling results and the complexity of the recognition algorithm into account, the dynamic time warping algorithm was mapped into custom FPGA hardware. Fast Simplex Links, which are intended specially for high-speed uni-directional transfers to and from the processor, were used to attach the custom hardware to MicroBlaze and pre-defined driver functions supplied by EDK enabled the communications between software and the custom hardware. The software-hardware implementation was then built after substituting custom hardware for software counterparts. The influence of memory assignments for performance is also investigated. External memory access is identified as a major bottleneck. By moving all code from external DRAM into internal BRAM, the system performance is increased by a factor of about 10. From the analysis and comparison of execution time, logic area, and energy consumption of various implementations, it is shown that the software-hardware implementation can speed up a software-only FPGA implementation up to 528 times, and achieves of the order of 20 times “time-area efficiency” and 40 times energy efficiency. Compared with the PC-based C implementation running with a 40 times faster clock rate, the improved software-hardware system runs only about 7 times slower and its performance can meet the real-time requirement to complete a recognition in under one second. In addition, the software / hardware co-design also significantly reduces the energy consumption associated with individual computations.
| Identifer | oai:union.ndltd.org:ADTP/279200 |
| Creators | Hongzhi Liu |
| Source Sets | Australiasian Digital Theses Program |
| Detected Language | English |
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