The topic of this thesis is to propose a dual-tracking clock data recovery device and method for LVDS. Particularly, it is related to a high speed data transmission which utilizes phase-locked loops (PLL) to trace and track two eyes (left eye and right eye), called dual-tracking, to align data sampling at the middle of data eye. Hence, the detection of the data is ensured to be optimal and the BER (bit error rate) is drastically reduced.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0726104-171821 |
| Date | 26 July 2004 |
| Creators | Hsiao, Chun-Yang |
| Contributors | Ju-Ya Chen, Chiu Jih Chy, Chun-Chin Wang, Hsiao-Hwa CHEN |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726104-171821 |
| Rights | restricted, Copyright information available at source archive |
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