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Flip Chip Solder Residual Improvement and Process CPK Control Analysis

With the progress of the semiconductor technology, the devices scaling down to submicron range leads to increase I/Os number and very fine pitch IC package type; such as BGA, Flip Chip and CSP type packages. For Flip chip packaging, the solder bumping process act as the role of I/O interconnection instead of conventational wirebonding process. The ball mounted process is defined as the solder ball mounted on the Flip Chip Ball Grad Array (FC-BGA) substrate for solder bumping.
In this study, how to improve the strength of ball-shear; residual tin capability and capability of process kit are the main issues to be investigated for the ball mounted process. To analyze the root cause and to implement the corrective action are the important purpose for solving the failures occurred on the ball mounted process. The following technologies included as (1) engineering ststictic methodology; JMP (statistical software) (2) Problem solving methodology (PSM) (3) Optimizing the process window (4) Set up the main parameters to analyse in machinery (5) how to monitor the CPK capability & material properties analysis, are used for these issues.
Finally, the ball mounted process has been successfully investigated and results in solving the failure of Flip Chip ball mounted process and surface mounted technology (SMT) process for assembly packaging manufacture completely.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0728107-172820
Date28 July 2007
CreatorsHuang, Jun-Chin
ContributorsYeu-Long Jiang, Herng-Yih Ueng, Chih-Hiong Liao
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728107-172820
Rightsnot_available, Copyright information available at source archive

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