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Design and FPGA Implementation for WiMAX Baseband Receiver

This thesis describes the design and implementation of the baseband receiver for the IEEE 802.16-2004 Worldwide Interoperability for Microwave Access (WiMAX) wireless communications systems. Firstly, a Matlab floating-point simulation platform is built for system design. In addition to the transmitted signals and the channel models, the signal processing algorithms for the baseband receiver are verified to meet the system performance required by the standard. Then the receiver functional blocks, which include packet detection, timing synchronization, frequency synchronization, channel estimation, and the 256-point fast Fourier transform (FFT), are designed and integrated. Fixed point simulation is also conducted by using Matlab. The hardware implementation is realized by using the Verilog Hardware Description Language (HDL). Behavioral level and gate level simulations are also conducted to verify the system design. The design is downloaded to the Field Programmable Gate Array (FPGA) for system verification.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0827107-144548
Date27 August 2007
CreatorsChen, Hou-ting
ContributorsYang-fang Chen, Chih-peng Li, Shiann-Shiun Jeng
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0827107-144548
Rightsnot_available, Copyright information available at source archive

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