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A gate array chip set as a fault-tolerant bus interface unit based on nubus protocols /

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1990. / Vita. Abstract. Includes bibliographical references (leaves 147-148). Also available via the Internet.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/22403876
Date January 1990
CreatorsTsai, Kuo-yeang,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceThis resource online

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