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Parallel processing and VLSI design a high speed efficient multiplier.

Thesis (M.S.)--Ohio University, November, 1985. / Title from PDF t.p.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/227799455
Date January 1985
CreatorsDandu, Venkata Satyanarayana Raju.
PublisherOhio : Ohio University,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceConnect to resource online

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