Return to search

Efficient arithmetic for high speed DSP implementation on FPGAs

Thesis (Eng.D.) - University of Glasgow, 2007. / Eng.D. thesis submitted to the Faculty of Engineering, Department of Civil Engineering, University of Glasgow, 2007. Includes bibliographical references. Print version also available.

  1. http://theses.gla.ac.uk/856/
Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/407020879
Date January 2007
CreatorsAlexander, Steven Wilson.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceConnect to e-thesis.

Page generated in 0.0024 seconds