Return to search

Modeling of a hardware VLSI placement system : accelerating the simulated annealing algorithm /

Thesis (M.S.)--Rochester Institute of Technology, 2005. / Typescript. Includes bibliographical references (leaves 81-83).

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/61853150
Date January 2005
CreatorsBatts, William Merle.
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceLink to online version

Page generated in 0.0031 seconds