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VLSI implementation for MPEG-1/Audio Layer III chip : bitstream processor - low power design /

Thesis (M.Phil.) - University of Queensland, 2005. / Includes bibliography.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/62546756
Date January 2004
CreatorsLin, Li-Yang.
Publisher[St. Lucia, Qld.],
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceVLSI implementation for MPEG-1/Audio Layer III chip</a><br>Read the abstract of the thesis

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