Return to search

New methodology for low power and less test time in VLSI testing

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/82368421
Date January 1900
CreatorsLee, Il-Soo,
Publisher[Austin, Tex. : University of Texas Libraries,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish

Page generated in 0.005 seconds