The electrical performance of on-chip interconnects has become a limiting factor
to the performance of modern integrated circuits including RFICs, mixed-signal
circuits, as well as high-speed VLSI circuits due to increasing operating frequencies,
chip areas, and integration densities. It is advantageous to have fast and accurate
closed-form expressions for the characteristics of on-chip interconnects to facilitate
fast simulation and computer-aided design (CAD) of integrated circuits. This thesis
work is mainly concerned with the analysis and the methodology of developing
closed-form expressions for the frequency-dependent line parameters R(��), L(��),
G(��), and C(��) for microstrip-type on-chip interconnects on silicon substrate.
The complete solutions of the frequency-dependent line parameters are formulated
in terms of corresponding lossless/static configurations for both single and
coupled microstrip-type on-chip interconnects. The series impedance parameters
are developed using a complex image approach, which represents the complicated
loss effects in the semiconducting silicon substrate. The shunt admittance parameters
are developed using low- and high-frequency asymptotic solutions based on
the shunt equivalent circuit models. The closed-form expressions are shown to be
in good agreement with full-wave and quasi-static electromagnetic solutions. Based
on the proposed closed-form solutions, a new on-chip interconnect extractor tool,
CELERITY, is implemented. It is shown that the new tool can significantly reduce
the simulation time compared with a quasi-static EM-based tool. The proposed
extraction technique should be very useful in the design of silicon-based integrated
circuits. / Graduation date: 2002
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/32190 |
| Date | 14 September 2001 |
| Creators | Lan, Hai |
| Contributors | Weisshaar, Andreas |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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