A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed
to implement the digital section of mixed-signal IC applications. This FSCL circuit technique
offers the advantage of low overlap current spikes during the switching transitions
of conventional CMOS gates. This overlap current spike has become one of the major
obstacles in improving the accuracy and performance of mixed-signal IC applications.
Using simple circuits, FSCL logic family can be interfaced with the existing CMOS family.
Thus it can nearly eliminate the power noise issue in the mixed-signal IC design.
In this thesis, design of a sinc3 decimation filter using the FSCL technique for a 2nd order
delta-sigma modulator has been presented. Simulation results show that this particular
decimation filter, using the newly developed FSCL technique, improves the performance
of the mixed-signal system. / Graduation date: 1994
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/36625 |
| Date | 17 November 1993 |
| Creators | Wong, Man Wa |
| Contributors | Kiaei, Sayfe |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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