Return to search

Design of an 8-bit Successive Approximation Pipelined Analog to Digital Converter (SAP-ADC) in 90 nm CMOS

No description available.
Date30 August 2017
CreatorsKotti, Vivek
PublisherWright State University / OhioLINK
Source SetsOhiolink ETDs
Detected LanguageEnglish
Rightsunrestricted, This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.

Page generated in 0.0019 seconds