碩士 / 華梵大學 / 工業管理學系碩士班 / 89 / This research intends to investigate the planning activities related to the assembly of memory module during the stages of pilot run. The study will be conducted with the joint effort of a memory module manufacturer to access the resources required and to ensure the practical values of this study. Process yield and assembly reliability will be achieved by the various methods, such as sampling techniques, experimental designs, reliability evaluation, etc. The process flow in the pilot run will be established to decide the desired materials characteristics and process parameters in a minimum lead-time period.
This research begins with collecting the information of the memory chips and module substrate and developing the process flow based on the product characteristics. Secondly, the sampling plan and the evaluation standards for material incoming inspection are determined as well. Experimental designs based on Taguchi’s orthogonal array are used to screen the various materials and process related parameters. The major factors that significantly influence the assembly quality are then identified. Samples prepared by the experiments are tested for their reliability and followed by the analysis of failure modes to provide information for further improvement. Finally, the test results are compared to the predetermined quality requirement. The process line is then ready for mass production if the base line criterion is satisfied.
| Identifer | oai:union.ndltd.org:TW/089HCHT0041002 |
| Date | January 2001 |
| Creators | Shi Jong Lin, 林四中 |
| Contributors | Chien Yi Huang, 黃乾怡 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 64 |
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