碩士 / 國立海洋大學 / 電機工程學系 / 90 / In wireless communication, the transmitted signal was affected by channel and Doppler effect. So that the phase and frequency of the received signal are randomly varied. In conventional receiver, carrier recovery is conducted by controlling the frequency and phase of the voltage controlled oscillator (VCO) in the phase-locked loop. Digital processing system has many advantages, using the TMS320C6711 DSK, an all digital phase-locked loop (ADPLL) for QPSK carrier recovery is constructed in this thesis. A frequency offset estimator is also included in the ADPLL to enhance the performance. It can minimize the phase error fast and make the carriers of received signal and local oscillator match each other. Furthermore, the D/A converter and SONY SIR 1000W data recorder are used to process the transmitted signal for off-line analysis. The experimental results show that the QPSK receiver using phase-locked loop is effective to overcome the phase drift problem, and reduce the BER caused by suddenly phase variation.
| Identifer | oai:union.ndltd.org:TW/090NTOU0442011 |
| Date | January 2002 |
| Creators | 胡義奐 |
| Contributors | 呂福生 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 0 |
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