碩士 / 國立中興大學 / 電機工程學系所 / 100 / This thesis investigates the electrical characteristic of FinFET device with different channel length and fin width, and the inversion carrier distribution inside the fin-shaped silicon. The hot carrier effect (HCE), negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), and the time dependent dielectric breakdown (TDDB) are used to study the device performance and reliability.
When the channel length is decrease, the threshold voltage (Vth) is reduced and the subthreshold swing (SS), drain induction barrier lower (DIBL) and the driving current (ID) is increase. The effect of lateral electric field induced by the drain voltage will increase by the potential of the channel due to the reduction of the channel barrier, resulting in the lower of gate control ability. When the fin width increases, the threshold voltage is reduced, the SS, DIBL, mobility and the driving current are increase. As the fin width increase, it will lead to the smaller saturated drain voltage. The channel surface potential is not only affected by the gate voltage, but also by the junction capacitance of the drain/fins and source/fin junctions. When the fin width increase, the junction depletion region of the drain/fins and source/fin junctions is also increase, resulting in the reduction of the junction capacitance and to affect the characteristics of the device.
Carrier distribution inside the fin-shaped silicon channels will be affected by the corner effect in the FinFET. The high electric field in the corner will cause the carriers tending to gather in the corner, rather than the uniform distribution in the fin. When the fin width is continuously decreases, the quantum effects will become important, resulting in the inversion carrier tending to move toward in the central of the Si fin.
In the degradation of hot carrier effects, the wider width of the fin is the smaller the saturated drain voltage. Under the same drain voltage conditions, the drain depletion region is larger for the device with wider fin structure, resulting in the more carrier collision and the more serious degradation. In the positive/negative bias temperature instability (PBTI/NBTI), as the width of the fin is smaller, the driving current degradation is more serious, due to the strong electric field inside of the fin-shaped Si channels. The interface of the oxide layer and the fin-shaped Si channels would generate more broken bonds caused by the carrier collision, so the device will exhibit more serious degradation. For TDDB testing, according to the breakdown currents of the gate, drain and source terminals, the damage of the FinFET can be divided into two types, which are the drain-side damage and the source-side damage one.
| Identifer | oai:union.ndltd.org:TW/100NCHU5441057 |
| Date | January 2012 |
| Creators | Po-Hsiu Hsiao, 蕭博修 |
| Contributors | Han-Wen Liu, 劉漢文 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 80 |
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