碩士 / 國立高雄師範大學 / 電子工程學系 / 102 / In thin work, Negative Bias Temperature Instability (NBTI), Positive Bias Temperature Instability (PBTI) and Hot Carrier Effect (HCE) were used to study the reliability of FinFET devices. Power law analyze was used to analysis the degradations of devices. NBTI was applied first to explore the degradation mechanism of P-type FinFET devices. It is observed that the threshold voltage shift negative ward because more holes are trapped in gate dielectric during stress that introduce the degradation of drain current. HCE and PBTI were used to find out the degradation mechanism of n-type FinFET device, and the threshold voltage shift versus stress time was analyzed by power law method. During HCE, the largest value of time power law exponent on VTH shift is found at VG=0.3VD which indicates that the VTH shift is dominated by interface state generation due to the impact ionization. On the other hand, even if the most serious impact ionization is occurred at VG=VD, the VTH shift is mainly caused by electrons trapping because of the large gate leakage current. On the other hand, as the devices were stress by PBTI, threshold voltage shift was caused by oxide trapping in gate dielectric. As the result, the power law exponents are similar with various stress voltages.
| Identifer | oai:union.ndltd.org:TW/102NKNU5428002 |
| Date | January 2014 |
| Creators | Tzu-Sung Yen, 嚴子松 |
| Contributors | Yi-Lin Yang, 楊宜霖 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 67 |
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