碩士 / 國立清華大學 / 電子工程研究所 / 104 / In recent years, the demand of consumer electronics increases, smart phone, tablet computer and liquid-crystal display (LCD) especially, and the results can be generally credited to improvement and progress of power devices. Major concerns of characteristics of high-voltage devices are breakdown voltage and on-resistance since they closely related to voltage endurance and low power consumption. However, the trade-off between breakdown voltage and on-resistance exists, the good choice of them is the key point to design excellent high-voltage devices.
In this work, we propose drain extended FinFETs (DE-FinFET) which can be fully compatible with FinFET CMOS logic process without extra mask or additional process flow. We use standard N-Well to drain by ion implantation and define drift region to endure high voltage. Thus, termination design such as field plate and field limiting ring are employed to extend the corner electric field at edge of drain junction under metal gate. The structure design of drain extended FinFETs and the characteristics of devices are used SDE and Sdevice simulation tool. For different N-Well concentration, N-Well depth and field plate length, we discuss on characteristics analysis of breakdown voltage and on-resistance. Measurement results demonstrated that the drain extended FinFETs can effectively raise breakdown voltage and maintain low on-resistance. This fully logic compatible device does not need the additional masks and wire bonding process for connection, therefore, can be used to various applications and keep the cost down.
| Identifer | oai:union.ndltd.org:TW/104NTHU5428049 |
| Date | January 2016 |
| Creators | Chen, Hsien Hao, 陳賢昊 |
| Contributors | King, Ya-Chin, 金雅琴 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 59 |
Page generated in 0.0098 seconds