碩士 / 國立清華大學 / 工程與系統科學系 / 104 / Transistors’ feature sizes continuingly scale down due to the lasting advancement of CMOS process; nevertheless, conventional MOSFET transistors confront some issues when transistors’ feature sizes scale down lower than 45 nm, such as the effect of subthreshold leakage, gate leakage, process variation, and so on.
Therefore, the author hopes to conquer foregoing factors by SOI substrate and FinFET structure. FinFET doesn’t own the said problems MOSFET transistors have, and the processes of FinFET and MOSFET are less variant. FinFET is thus considered the better choice to attain VLSI circuit.The channel that FinFET connects to drain and sourse looks like fin and its shape is high and thin.The gate which controls path leading or not compasses three sides of channel, hence the gate has the better controlled qulity to make the channel on or off.
First of all, SOI FinFET is successfully finished and gets the good initial qulity. And its Tinv can be scaled down to 1.4 nm, and the gate leakage is reduced to 2x10-3 A/cm2 as well. And the transistor characteristics such as drain current (3.26x10-5 A/μm), transconductance(13 μA/V) and carrier mobility (200 cm2/V-sec) are in compliance with the academic standards, and S.S (Subthreshold Swing) is well about 66 mV/dec.
In the second part, in order to continuously promote device characteristics, the aurthor
uses different doping activation methods to make drain current, Gmmax and interfacial characteristics of device further improved. The experiment results show that the low-temperature-microwave-annealing device gets very low gate leakage current density of 6.7 x10-6 A/cm2 and Tinv can attain to 1.8 nm while the rapid-thermal-annealing-after-laser device can obtain the maximum drain current (8.9x10-5 A/μm), transconductance (24.9 μA/V), and carrier mobility (210 cm2/V-s). And the low-temperature-microwave-annealing device gets the better reliability compared to other annealing devices.
In the third part, the author modulates the channel height, continues using rapid-thermal-annealing-after-laser method to activate the dopant, and anticipates getting the larger drain current and suppress threshold voltage roll-off at the same time by making use of rapid-thermal-annealing-after-laser method. The experiment results show that S.S of the 40nm-channel-height device is the lowest(71 mV/dec). And the threshold voltage of different channel-height devices can all controlled approaching approximately 0.75 V. The 60nm-channel-height device gets maximum drain current (1.3x10-5 A/μm), transconductance (21 μA/V) and carrier mobility (220 cm2/V-s), and the performance of reliability is excellent as well.
| Identifer | oai:union.ndltd.org:TW/104NTHU5593006 |
| Date | January 2015 |
| Creators | Feng, Hao Ting, 馮浩庭 |
| Contributors | Chang-Liao, Kuei Shu, 張廖貴術 |
| Source Sets | National Digital Library of Theses and Dissertations in Taiwan |
| Language | zh-TW |
| Detected Language | English |
| Type | 學位論文 ; thesis |
| Format | 95 |
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